/**
  ******************************************************************************
  * @file    acad_cfg.c
  * @author  Feirui_Joe
  * @version V0.1
  * @date    08/7/2024
  * @brief   ACAD Handling
  ******************************************************************************
  * @copy
  *
  * <h2><center>&copy; COPYRIGHT 2010 Feirui</center></h2>
  */ 



/**
  * @brief  INCLUDE FILES.
  */
#ifndef	ACAD_CFG_GLOBALS
#define	ACAD_CFG_GLOBALS
#include <includes.h>
#include "acad_driver.h"
#include "acad_cfg.h"


const GPIOPortCfg_TypeDef ACADCPortCfgTbl[ACADCPortCfgNumber]={
	{
        RCCPeriph_ADCGEN_U     ,
	    GPIOModeI_ADCGEN_U     ,
	    GPIOSpeed_ADCGEN_U     ,
	    GPIOxPort_ADCGEN_U     ,
	    GPIOxBitx_ADCGEN_U     ,
    },

    {
        RCCPeriph_ADCGEN_V     ,
        GPIOModeI_ADCGEN_V     ,
        GPIOSpeed_ADCGEN_V     ,
        GPIOxPort_ADCGEN_V     ,
        GPIOxBitx_ADCGEN_V     ,
    },
                          
    {
        RCCPeriph_ADCGenEXCV    ,
        GPIOModeI_ADCGenEXCV    ,
        GPIOSpeed_ADCGenEXCV    ,
        GPIOxPort_ADCGenEXCV    ,
        GPIOxBitx_ADCGenEXCV    ,
    },

	{
        RCCPeriph_ADCGEN_W     ,
        GPIOModeI_ADCGEN_W     ,
        GPIOSpeed_ADCGEN_W     ,
        GPIOxPort_ADCGEN_W     ,
        GPIOxBitx_ADCGEN_W     ,
    },
                          
    {
        RCCPeriph_ADCDroopA     ,
        GPIOModeI_ADCDroopA     ,
        GPIOSpeed_ADCDroopA     ,
        GPIOxPort_ADCDroopA     ,
        GPIOxBitx_ADCDroopA     ,
    },

    {
        RCCPeriph_ADCDroopB     ,
        GPIOModeI_ADCDroopB     ,
        GPIOSpeed_ADCDroopB     ,
        GPIOxPort_ADCDroopB     ,
        GPIOxBitx_ADCDroopB     ,
    },
	{
        RCCPeriph_ADCGenEXCI    ,
        GPIOModeI_ADCGenEXCI    ,
        GPIOSpeed_ADCGenEXCI    ,
        GPIOxPort_ADCGenEXCI    ,
        GPIOxBitx_ADCGenEXCI    ,
	},
	{
        RCCPeriph_ADCDroopC     ,
        GPIOModeI_ADCDroopC     ,
        GPIOSpeed_ADCDroopC     ,
        GPIOxPort_ADCDroopC     ,
        GPIOxBitx_ADCDroopC     ,
    },                   
    {
        RCCPeriph_ADCBuildVoltAFT,
        GPIOModeI_ADCBuildVoltAFT,
        GPIOSpeed_ADCBuildVoltAFT,
        GPIOxPort_ADCBuildVoltAFT,
        GPIOxBitx_ADCBuildVoltAFT,
    },
    {
        RCCPeriph_ADCBuildVoltBEF,
        GPIOModeI_ADCBuildVoltBEF,
        GPIOSpeed_ADCBuildVoltBEF,
        GPIOxPort_ADCBuildVoltBEF,
        GPIOxBitx_ADCBuildVoltBEF,
    },
    {
        RCCPeriph_ADCLOAD_U      ,
        GPIOModeI_ADCLOAD_U      ,
        GPIOSpeed_ADCLOAD_U      ,
        GPIOxPort_ADCLOAD_U      ,
        GPIOxBitx_ADCLOAD_U      ,
    },
    {
        RCCPeriph_ADCLOAD_V      ,
        GPIOModeI_ADCLOAD_V      ,
        GPIOSpeed_ADCLOAD_V      ,
        GPIOxPort_ADCLOAD_V      ,
        GPIOxBitx_ADCLOAD_V      ,
    },
    {
        RCCPeriph_ADCLOAD_W      ,
        GPIOModeI_ADCLOAD_W      ,
        GPIOSpeed_ADCLOAD_W      ,
        GPIOxPort_ADCLOAD_W      ,
        GPIOxBitx_ADCLOAD_W      ,
    },
    {
        RCCPeriph_ADCVREF        ,
        GPIOModeI_ADCVREF        ,
        GPIOSpeed_ADCVREF        ,
        GPIOxPort_ADCVREF        ,
        GPIOxBitx_ADCVREF        ,
    },
    {
        RCCPeriph_ADCLoadEXCV    ,
        GPIOModeI_ADCLoadEXCV    ,
        GPIOSpeed_ADCLoadEXCV    ,
        GPIOxPort_ADCLoadEXCV    ,
        GPIOxBitx_ADCLoadEXCV    ,
    },
    {
        RCCPeriph_ADCLoadEXCI    ,
        GPIOModeI_ADCLoadEXCI    ,
        GPIOSpeed_ADCLoadEXCI    ,
        GPIOxPort_ADCLoadEXCI    ,
        GPIOxBitx_ADCLoadEXCI    ,
    },
};


/* ADC1 Regular configuration */
const ADCRegularCfg_TypeDef ADC1RegularTbl[ADC_RegularNumber]={
	{
        ACAD_ADC1_Regular1_Channel   ,
	    ACAD_ADC1_Regular1_Order     ,
	    ACAD_ADC1_Regular1_SampleTime,
    },                      
	{
        ACAD_ADC1_Regular2_Channel   ,
	    ACAD_ADC1_Regular2_Order     ,
	    ACAD_ADC1_Regular2_SampleTime,
    },                      
	{
        ACAD_ADC1_Regular3_Channel   ,
	    ACAD_ADC1_Regular3_Order     ,
	    ACAD_ADC1_Regular3_SampleTime,
    },
	{
        ACAD_ADC1_Regular4_Channel   ,
	    ACAD_ADC1_Regular4_Order     ,
	    ACAD_ADC1_Regular4_SampleTime,
    },
	{
        ACAD_ADC1_Regular5_Channel   ,
	    ACAD_ADC1_Regular5_Order     ,
	    ACAD_ADC1_Regular5_SampleTime,
    },
	{
        ACAD_ADC1_Regular6_Channel   ,
	    ACAD_ADC1_Regular6_Order     ,
	    ACAD_ADC1_Regular6_SampleTime,
    },                     
	{
        ACAD_ADC1_Regular7_Channel   ,
	    ACAD_ADC1_Regular7_Order     ,
	    ACAD_ADC1_Regular7_SampleTime,
    },                      
	{
        ACAD_ADC1_Regular8_Channel   ,
	    ACAD_ADC1_Regular8_Order     ,
	    ACAD_ADC1_Regular8_SampleTime,
    },
};

/* ADC2 Regular configuration */
const ADCRegularCfg_TypeDef ADC2RegularTbl[ADC_RegularNumber]={                            
	{
        ACAD_ADC2_Regular1_Channel   ,
	    ACAD_ADC2_Regular1_Order     ,
	    ACAD_ADC2_Regular1_SampleTime,
    },
	{
        ACAD_ADC2_Regular2_Channel   ,
	    ACAD_ADC2_Regular2_Order     ,
	    ACAD_ADC2_Regular2_SampleTime,
    },
	{
        ACAD_ADC2_Regular3_Channel   ,
	    ACAD_ADC2_Regular3_Order     ,
	    ACAD_ADC2_Regular3_SampleTime,
    },
	{
        ACAD_ADC2_Regular4_Channel   ,
	    ACAD_ADC2_Regular4_Order     ,
	    ACAD_ADC2_Regular4_SampleTime,
    },
	{
        ACAD_ADC2_Regular5_Channel   ,
	    ACAD_ADC2_Regular5_Order     ,
	    ACAD_ADC2_Regular5_SampleTime,
    },
	{
        ACAD_ADC2_Regular6_Channel   ,
	    ACAD_ADC2_Regular6_Order     ,
	    ACAD_ADC2_Regular6_SampleTime,
    },
	{
        ACAD_ADC2_Regular7_Channel   ,
	    ACAD_ADC2_Regular7_Order     ,
	    ACAD_ADC2_Regular7_SampleTime,
    },
	{
        ACAD_ADC2_Regular8_Channel   ,
	    ACAD_ADC2_Regular8_Order     ,
	    ACAD_ADC2_Regular8_SampleTime,
    },
};


/* Buffer Area1 Address */
const uint32_t ACBufferArea1Address[ADCBufferAreaNum+1]={
	/* Start Address          DMA Number      16bit Area */
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *0,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *1,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *2,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *3,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *4,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *5,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *6,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *7,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *8,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *9,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *10,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *11,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *12,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *13,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *14,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *15,
	ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *16,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *17,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *18,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *19,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *20,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *21,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *22,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *23,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *24,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *25,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *26,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *27,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *28,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *29,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *30,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *31,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *32,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *33,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *34,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *35,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *36,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *37,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *38,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *39,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *40,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *41,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *42,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *43,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *44,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *45,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *46,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *47,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *48,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *49,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *50,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *51,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *52,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *53,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *54,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *55,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *56,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *57,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *58,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *59,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *60,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *61,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *62,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *63,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *64,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *65,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *66,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *67,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *68,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *69,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *70,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *71,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *72,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *73,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *74,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *75,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *76,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *77,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *78,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *79,
	// ACAD_DMA_MemoryBaseAddr+ADCDataTotalNum   *2   *80,
};


/*$PAGE*/#endif	/*	ACAD_CFG_GLOBALS	*/
